VIA Apollo Pro 133: A Camino Preview

Intel is taking a different approach to chipset manufacturing after years of dealing with the same old North/South bridge combination, they recently debuted their Accelerated Hub Architecture (AHA) with the 810 chipset.  Instead of having everything communicate with the memory/CPU via the PCI bus, the new Accelerated Hub Architecture allows for direct communication between the memory/CPU and disks, peripherals, and in the case of the i810 chipset, the graphics adapter.

The key to the success of the Accelerated Hub Architecture is the substitution of individual hub interfaces for the PCI bus in connecting the various parts of your system to your memory/CPU on the motherboard end of things. Take a look at the acronym PCI, Peripheral Component Interconnect, it doesn't really scream "all-purpose-bus" now does it? Intel took what was once a two-chip solution (North/South Bridge) and converted it into a two chip, three-hub solution, the first implementation being the i810 chipset. The three individual hubs are the Graphics and Memory Controller Hub (GMCH), the I/O Controller Hub (ICH) and the Firmware Hub (FWH). The two main hubs, the GMCH and the ICH are connected via an internal bus that offers double the bandwidth of the PCI bus, 266MB/s. This is a definite improvement over the "old" way of doing things and will shortly become the new standard as far as chipsets go, don't expect Intel to return to the classical way of doing things on the motherboard level anytime soon.

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It wouldn't be surprising to see VIA adopt an approach similar to Intel's AHA, but such a move wouldn't occur until much further down the line in the development of VIA chipsets.  In any case, a key difference between the Apollo Pro 133 and the soon to come i820 is the architecture behind the two chipsets, the conventional North/South bridge setup vs Intel's Accelerated Hub Architecture.